The present invention relates to a power signal processing system suitably used with a power protection system or a control system of a power transmission and distribution system, including a power system and a distribution system, and more particularly to a power signal processing system and a related system, based on a multiprocessor system, with processing means optimally distributed into a plurality of units according to respective processing functions.
The present invention also relates to a protective relay system for a power system, comprising a plurality of units optimally distributed according to respective processing functions, and more in particular to standardization of software for a digital protective relay operation.
(1) In recent years, a digital relay has been developed as a protective relay for a power system to process voltage or current signal data sampled at regular time intervals, detect a system fault and thus to protect the system.
A conventional digital relay of this type, as disclosed in the Journal of the Institute of Electrical Engineers of Japan, Vol. 105, No. 12, p. 12, infra, comprises an input section, a processing section, a setting section and an output section. The input section of this relay includes a filter, a sample-hold circuit, a multiplexer, an analog-digital converter and a buffer. Also, the processing section includes a CPU (microprocessor), a RAM and a ROM for relay computation. In this case, a plurality of relay functions are executed by the CPU in a time division multiplexing mode.
In another similar digital relay system, current and voltage signals are supplied from a current transformer CT, a transformer PT and the like arranged on a transmission line L, and these signals undergo computations according to a predetermined algorithm, thereby to monitor the system for an accident. If an accident, such as grounding, occurs in the transmission line L, this system receives the resulting variations in current and voltage signals, makes a computation on the basis of these signals, pinpoints the position of the fault, and produces a signal for tripping a circuit breaker at an optimal position.
A higher-graded protective performance, higher speed and greater accuracy are now required in order to meet the more and more complicated phenomena of system accidents. A multitude of data are required to be processed at high speed according to various algorithms.
The above-mentioned type of digital relay, however, is limited in the processing ability of the processing section thereof, and is hardly able to meet the great data processing requirements. An unavoidable measure is to arrange a plurality of digital relays in juxtaposition, thus posing the problem of a generally bulky system configuration.
Such a system, being an assemblage of a plurality of independently-functioning digital relays, is not easily able to secure cooperation among the relays. For example, it is difficult for the relays to share the results of operation. Separate executions of operations are unavoidable for the respective relays, thus leading to the problem of low operating efficiency.
A multiprocessor system for executing the operations of a plurality of microprocessors has also been suggested.
In this type of system, as disclosed in JP-A-60-84912, the protective operation is divided into a plurality of individual processing operations for protective relay elements, respectively, which individual processing operations are executed by independent operation modules connected by a serial data transmission line. Each operation module receives only the data required by itself as an input, and after accomplishing an assigned operation, transmits its output to the serial data transmission line.
Another digital protective relay system for power applications is disclosed in the 1986 National Conference Report No. 1319 of the Institute of Electrical Engineers of Japan. In this system, the functions related to the protective relay are divided into a plurality of units respectively packaged on different printed boards, which are connected through a system bus. The units are divided according to the required functions into analog input, computation, setting, accident detection, power supply, input converter, indication, output, input and auxiliary relay sections.
Of all the aforementioned conventional systems, the system configured of a plurality of operation modules has the protective operation divided by element, and each protective operation thus divided is processed as a pipeline system separately.
The data transfer by a serial transfer line, however, consumes considerable time, and the requirement of serial-parallel conversion at each module increases the processing overhead. This conventional system, therefore, lacks a sufficient processing ability for a protective relay requiring the real-time processing of a great amount of data. Also, a relay system having a multiplicity of elements requires a multiplicity of processing modules, resulting in a bulky system. The great time taken for data transfer among modules, on the other hand, makes high-speed processing difficult.
The digital relay disclosed in the Journal of the Institute of Electrical Engineers of Japan, in spite of the fact that its protective relay functions are divided into a plurality of units, fails to take into consideration the appropriate control of timings and the like of operation and data transfer between the units.
Specifically, in the case where data transfer is to be executed between a given unit and another unit, each unit is required to secure the right to use the bus and execute the control operation to see whether communications between the units is possible. This not only complicates the control operation, but also requires an additional function of each unit for the particular purpose, thus posing the problem of an increased overhead. In addition, if the bus is occupied by another unit, it is necessary to defer data transfer. This is a problem which is not negligible for a relay system for power applications requiring the processing of a great amount of data in a short time.
Further, these control functions, which are provided for each unit to meet the system configuration and are different from one system to another, are difficult to standardize.
Additionally, in expanding an existing relay system, it is necessary to set the control functions anew for each unit. This renewed setting is effected by rewriting the control program of the microprocessor of each unit, and the rewriting of the control programs of all the microprocessors takes considerable time and labor. Since it is necessary to prepare each control program taking the characteristic difference between the unit functions into consideration, the problem of a narrow capacity of expansion is posed.
Also, the use of a microprocessor in the processing operation imposes a limit on the processing capacity of the unit in high-speed operation. Seeking high speed would sacrifice accuracy, and vice versa. If the processing capacity is to be improved, on the other hand, many units are unavoidably added. Adding units in the system, however, gives rise to various problems as described above.
Another conceivable method of improving the general processing capacity may be to use a plurality of systems in parallel. The scale of the whole system configuration would be increased, accompanied by an increased power consumption and cost. Also, because the smooth cooperation among the systems is not an easy matter, a lower reliability would be unavoidable in the functions requiring the cooperation among parallely-operated systems, thereby making it difficult to realize high functions.
Furthermore, the generally low reliability of the analog input section would make it indispensable to switch the input signal to a check signal for inspecting all the channels at regular intervals of time (say, once every day) in order to improve the data reliability. This requirement is conventionally met by adding a special check circuit. This results in an increased volume of hardware and a complicated software processing, thus providing a bottleneck against an improved reliability.
(2) Another conventional digital relay is disclosed in the Journal of the Institute of Electrical Engineers of Japan (Vol. 105, No. 12, p. 1158 to p. 1160) and Hitachi Hyoron (Vol. 63, No. 4, April 1981, p. 52 infra). This digital relay comprises an input section, a computation processing section, a setting section and an output section. The input section generally has a 12-bit A/D converter, and a 16-bit microprocessor (MPU) is used for processing the relay operation. This MPU is of what is called a fixed point arithmetic type. Also, the software (operation technique) relating to the protective relay operation is realized by time-division multiple processing of the operations of a plurality of types of protective relays (including a reactance relay, a mho relay and an offset relay). The product computation technique is generally used as a computation algorithm as disclosed in the latter publication.
The above-described conventional systems, in which the operation programs relating to a plurality of protective relays are prepared separately from each other, has the problem that a long time is required for preparing operation programs for an inferior software productivity and a great program capacity is required.
This problem is also attributable to the fact that a 16-bit processor of the fixed point arithmetic type is used for the operation and the processing speed for multiplication is low.
In the 16-bit processor of fixed point arithmetic type, the processing for securing a predetermined number of significant digits becomes more complicated with the increase in multiplication commands, and the program is required to be modified depending or the number of relay settings.
Further, the limited program capacity and limited execution time leaves something to be desired with respect to accuracy as the program cannot be prepared with a high accuracy.